Processing instruction words

ABSTRACT

A method for processing an instruction word in a data processing system, the instruction word comprising a plurality of instruction bit positions, each bit position corresponding to an instruction actions, and a status of the bit at an instruction bit position indicating whether the instruction action corresponding to that bit position should be performed; the method comprising: forming a plurality of single action words, each single action word corresponding to one of the instruction actions and having a bit set at the bit position corresponding to that instruction actions and all its other bits un-set; forming a common action word having bits set at the bit positions corresponding to the instruction actions of any of the single action words and all its other bits un-set; comparing the instruction word and the common action word, and if the instruction word and the common action word have no bits set in common terminating processing of the instruction, and otherwise: repeating for successive single action words the steps of: comparing the instruction word and the respective single action word, and if the instruction word and the respective single action word have a bit set in common, performing the action corresponding to that single action word, and setting the instruction word to be equal to the present value of the instruction word exclusive-Ored with the respective single action word; until all the bits in the instruction word are zero.

This invention relates to apparatus and methods for processinginstruction words.

There is an increasing number of applications in which data istransferred between a transmitter and a receiver as a plurality of datastreams over a single logical link. The data streams can be segmented atthe transmitter into packets, each of which contains some data from thedata streams. Usually, but not necessarily, each packet contains datafrom only one of the data streams. The packets are then transmittedindependently over the link. When the packets are received at thereceiver they are reassembled so as to reform the data streams.Advantages of this system over conventional analogue techniques are thatthere is no need for a dedicated link or channel to be assigned to eachof the data streams, that interference in transmission may affect onlysome of the packets, leaving some data streams unaffected; and thatpackets may be routed to the receiver over any available physical linkand still combined properly to re-form the data streams even if thepackets arrive out of order.

Each packet normally includes control data that allows the packet to bereassembled properly by the receiver. This may comprise data indicatingthe data stream whose data is included in the packet, and a serialnumber for the packet so that the packet can be combined in the correctorder with others from that data stream. The control data can alsocomprise error-check data such as a checksum for allowing the receiverto verify that the packet has not been corrupted during transmission.

One application for the above technology is in the delivery of digitalvideo signals to households via cable or satellite links. Digital videostreams may be packetized and then broadcast to household receivers. Auser of a receiver may then select one of the streams for viewing. Thereceiver can then reassemble that video stream from the receivedpackets, convert it to a form suitable for input to the user'stelevision and then output the resulting signal to the television. Ithas been proposed that such systems could offer additional features.These features include the storing of received streams for laterviewing, and the displaying of program guides. (lists of programs withtransmission times) which could be assembled by the receiver fromcertain transmitted packets.

FIG. 1 shows the transport packet stream syntax specified in ITU-Tstandard H.222.0, equivalent to ISO/IEC standard 13818-1. (Furtherdetail of the structure is available from the standard itself, thecontents of which are incorporated herein by reference). FIG. 1 isequivalent to annex F.0.1 of the H.222 standard. The transport stream 1comprises a stream of packets, each of which consists of 188 bytes. Eachpacket has a variable length header illustrated at 2 and a payload whichoccupies the remainder of the packet. The header has the followingstructure:

Number of bits Signification 8 Synchronisation byte 1 Transport errorindicator 1 Payload unit start indicator 1 Transport priority 13 Programidentification (PID) 2 Transport scrambling control 2 Adaptation fieldcontrol 4 Continuity counter Variable Adaptation field

The structure of the adaptation field is shown in more detail in FIG. 1.

Data representing video, audio, system information such as programguides and other user data streams can be carried as PES packets, whichcan be included in the payloads of the transport stream packets. Thestructure of a PES packet is shown in FIG. 2. FIG. 2 is equivalent toannex F.0.2 of the H.222 standard. Each PES packet comprises a 24 bitpacket start code prefix, an 8 bit stream identification, 16 bitsindicating the length of the PES packet, an optional variable length PESheader and PES packet data of variable length.

FIG. 3 shows that the PES packets together form part of a programstream, whose structure is shown in FIG. 3. FIG. 3 is equivalent toannex F.0.7 of the H.222 standard.

In addition, section data can be carried in the packets. The sectiondata can include information that is to be interpreted by the decodingunit. For example, section data may include:

1. data that is to be assembled by the receiving unit into a programguide indicating the programmes that are to be provided on a channel;

2. data that is to be assembled into code that can be executed by aninterpreter (an “0-code interpreter”) in the receiving unit; and/or

3. data that is to be assembled into decoding keys to allow thereceiving unit to decrypt encoded data transmissions such aspay-per-view video.

The overall structure of an H.222 packet containing section data issummarised in FIG. 4, which shows schematically some important featuresof the packet. The packet comprises a header 5, an adaptation field 6and a payload 7. The header includes a payload unit start bit 8 and aprogram identifier (PID) 9. The payload includes one or more sections 10and, if the payload unit start bit is set, a pointer field 11 whichindicates the offset x to the start of the first new section (theintervening bits of the packet may represent tail data of a precedingsection). Each section includes information giving the length of thatblock, and periodically a section includes CRC (cyclic redundancy check)data for it, in order for the receiver to check that section has beencorrectly received.

A receiving unit can check that a contiguous group of blocks of dataforming a section has been received correctly, by calculating a CRCvalue for the section once it has been received and comparing thecalculated CRC value with the received CRC data or, for example, apreset value. If there is the required match then it is assumed that thedata has been received correctly. If there is not the required matchthen the whole section as received is discarded. Retransmission of thesection may then be requested, or the receiver may assume that theincorrectly received section has been lost and continue by receiving thenext section. In one such checking method a counter is maintained at thereceiver, with an initial value of −1. Every incoming byte is combinedin turn with the value in the counter to create a new value. The 4 bytesof CRC data at the end of a section are of the values such that if theyand the rest of the section have been correctly received then afterthose 4 bytes have been combined in turn with the counter the value ofthe counter will be zero. A final value in the counter that does notmatch zero indicates that data has been corrupted.

It is frequently arranged that the bits of a word are used to indicateactions such as filtering actions, and that bits of that word arecompared wit those of another word, so that if a match is found wherebits in corresponding positions in both words are set the action isperformed. For example, a data item in a transport stream may have afield indicating the stream to which it belongs by the setting of bitsin that word at positions corresponding to the respective streams. Aword may be configured having its bits set in the positionscorresponding to the streams that a user desires to receive. Bycomparing the bits of the words one-by-one it can be determined whetherthe data item belongs to a desired stream and therefore whether it is tobe filtered or transmitted onward.

The longer the words are the longer a one-by-one comparison takes. Itwould be preferable to use a method that allows for more efficientcomparison of the bits of the words.

According to one aspect of the present invention there is provided amethod for processing an instruction word in a data processing system,the instruction word comprising a plurality of instruction bitpositions, each bit position corresponding to an instruction action, anda status of the bit at an instruction bit position indicating whetherthe instruction action corresponding to that bit position should beperformed; the method comprising: forming a plurality of single actionwords, each single action word corresponding to one of the instructionactions and having a bit set at the bit position corresponding to thatinstruction action and all its other bits un-set; forming a commonaction word having bits set at the bit positions corresponding to theinstruction actions of any of the single action words and all its otherbits un-set; comparing the instruction word and the common action word,and if the instruction word and the common action word have no bits setin common, terminating processing of the instruction, and otherwise:repeating for successive single action words the steps of: comparing theinstruction word and the respective single action word, and if theinstruction word and the respective single action word have a bit set incommon, performing the action corresponding to that single action word,and setting the instruction word to be equal to the present value of theinstruction word exclusive-ORed with the respective single action word;until all the bits in the instruction word are zero.

According to a second aspect of the present invention there is provideda data processing apparatus for processing an instruction word, theinstruction word comprising a plurality of instruction bit positions,each bit position corresponding to an instruction action, and a statusof the bit at an instruction bit position indicating whether theinstruction action corresponding to that bit position should beperformed; the apparatus comprising: means for forming a plurality ofsingle action words, each single action word corresponding to one of theinstruction actions and having a bit set at the bit positioncorresponding to that instruction action and all its other bits un-set;means for forming a common action word having bits set at the bitpositions corresponding to the instruction actions of any of the singleaction words and all its other bits un-set; means for comparing theinstruction word and the common action word, and if the instruction wordand the common action word have no bits set in common, terminatingprocessing of the instruction, and otherwise: repeating for successivesingle action words the steps of: comparing the instruction word and therespective single action word, and if the instruction word and therespective single action word have a bit set in common, performing theaction corresponding to that single action word, and setting theinstruction word to be equal to the present value of the instructionword exclusive-ORed with the respective single action word; until allthe bits in the instruction word are zero.

The instruction word is suitably a 32 bit word.

The instruction action is suitably a filter or transmission action.

The data processing system is suitably for processing an input datastream comprising a plurality of data units. Each data unit suitablycomprises a field indicative of characteristics of the data unit and theinstruction word is formed from the contents of the said field. The saidfield may comprise bits indicative of the transport stream to which theinstruction word belongs. The action may be an action to filter or totransmit the data unit from which the instruction word is derived.

Preferably the instruction word, each single action word and the commonaction word have the same length.

The single action words and/or the common action word are preferablyaccessable by a user, for example a data processing device, for definingthe actions that are to be performed. In a preferred arrangement, theuser is capable of setting individual bits of the common action word todesired values, and the single action words are formed in dependence onthe content of the common action word.

In a preferred arrangement, the actions are actions for filtering orforwarding data streams or individual data items. Each of the data itemspreferably includes a field indicative of one or more classes to whichit belongs. The instruction word is then suitably formed from thatfield. Thus, preferably the method comprises the steps of repeatedlyreceiving a data item, forming the instruction word from a field of thatdata item indicative of the classes to which the data item belongs,processing the instruction word as set out above, and then repeating theprocess for the next item.

Suitably the data processing system is provided on a single integratedcircuit.

The data stream is suitably formed of packets. The data units may becomprised within the packets, for example as payload data or sectiondata. The data stream may be in accordance with the ITU-T H.222 standardor a derivative thereof.

The present invention will now be described by way of example withreference to the accompanying drawings, in which:

FIGS. 1 to 4 illustrate aspects of the H.222 standard for packet datatransmissions;

FIG. 5 shows the structure of a decoder unit and associated equipment;and

FIG. 6 illustrates the structure of a buffer and associated pointers.

FIG. 5 shows the general structure of a decoder unit 12 and ancillaryequipment for handling an H.222 feed and outputting a video, audio,graphics or other feed to a suitable output unit such as a television orhi-fi. In this example the H.222 feed is received from satellitebroadcast radio signals by satellite receiver dish 13. The satellitedish is connected to a tuner 13 b which selects a single transponderchannel of the satellite's transmissions under the control of a signalreceived over link 13 c from the decoder unit 12. The transponderchannel bears an H.222 packet data feed which may include data for anumber of video and audio channels. The data from the transponderchannel is sent over link 14 to the decoder.

The decoder includes a main memory 15 which may be implemented on one ormore dedicated memory chips (integrated circuits) and a processingsection 16 which may be implemented on one or more integrated circuits.The processing section includes a local memory 17, a processing unit 18which runs software stored in memory 17 and a transmissioncontrol/peripheral transport interface (TC/PTI) unit 19 which isconnected to memory 15 and memory 17 for transferring date rapidlybetween the two. The processing unit 18 is also connected to memory 15.The processing section has direct memory access (DMA) to memory 15.

The software code stored in the main memory is of three general types:user code, which includes code for interpreting program guidestransmitted to the decode, for drawing graphics and for running“o-code”; PTI code together with drivers for output protocols such asaudio, UART, tuner and video; and TC code. The user code can make callson the PTI code. The user code and the PTI code together provide thesoftware for decoding incoming data. The TC code provides the softwarefor handling the error checking and demultiplexing of incoming data.

Program guides are built up from section data received by the decoderfrom time to time. The program guides are then stored by the decoder sothat they can be displayed for a user when requested. Code for executionat the receiver or a subsequent processor can also be downloaded. O-codeis one example of such downloadable code. O-code can be assembled fromsection data received from time to time. O-code represents softwareinstruction code that can be run when required under the supervision ofthe o-code interpreter. O-code can be used, for example, for providinginteractive advertisements, games or home shopping applications.

An output section 20 is provided in the decoder 12. The output sectionis connected to the memory 15 and the processing section 16. The outputsection is capable of performing relatively high level decoding and/ordecompression for generating suitable output signals from the decoder.For example, the output section may be capable of decoding received MPEGor JPEG data. The output from the output section may pass to an outputunit such as a television 21. The decoder includes an alternate output22 for providing access to low level representations of the receiveddata, for example cleaned and/or descrambled versions of the inputstream to the decoder. This may be used by, for example, a digital videorecorder 23.

The decoder also includes a control interface 24 for low speedbi-directional communication with a data service provider. In theexample of FIG. 5 the control interface takes the form of a modem whichis connected via a telephone line 25 to the service provider. Thecontrol interface provides a means for the decoder to request programsfrom the service provider.

In use the satellite may provide 32 transponder channels. One of theseis selected by the receiving equipment (either fixedly or under usercontrol). The selected transponder channel, which may be able to provide8192 individual PID (program identification) streams, may carry 5 or 6video channels and associated audio channels and support data such asprogram guide information. The user code defines a set of (e.g. 48)PIDs, and received packets bearing those PIDs are detected on thetransponder channel and processes.

Under the H.222 standard each received packet may contain section dataor PES data. Each packet may contain data from only a single PID. Apacket containing PES data may contain data from only a single PESpacket. A packet containing section data may contain data from one ormore sections. See, for example, annex F.0.2-6 of the H.222 standard.

When the user code selects (either automatically or under the control ofthe user) that data from a PID is to be received it transmits the valueof that PID to the processor 18. The processor stores the value of thatPID in its local memory. The PID information in each incoming packet iscompared with the stored PIDs. Packets not bearing one of the stored PIDare discarded. If the specified PID is a section PID then the user codealso specifies 8 bytes of selection data. When section data for that PIDhas been received bytes 0 and 3 to 9 of the section data (i.e. the startof the section header omitting bytes 1 and 2 which indicate the sectiondata's length) are masked with the 8 bytes of selection data. If thereis no match then the section data is discarded. This feature allows auser to filter out unwanted section data. When the end of a section isreached (as indicated by the received section data) the processordeletes the PID of that section from local memory to terminate receptionof data from that PID.

One commercial use of the apparatus described above is as a hardwareplatform for implementation of set top box decoders (or other types ofdecoders) by applications programmers. In that situation the hardware asdescribed above would perform the basic decoding functions, and the usercode stored in the main memory could be developed by an applicationsprogrammer for a specific implementation. In designing the hardware forthat use, it is highly preferable to substantially optimise the hardwarefor fast decoding of incoming data without the need for intervention bythe user. One area where this is pertinent is in the decoding andbuilding up of section data that is to be used by the user code tointerpret, for example, program guides. As described above, a block ofreceived data (whether PES or section data) is not known to be validuntil all parts of it have been received, including any check data. Inprior art systems it has been necessary for the user code to takeaccount of this and to be aware that error checking of the receivedsection data may make it necessary to discard data.

The present system may be implemented as a hardware peripheral forsupporting demultiplexing of, and data extraction from a transportstream. The transport stream is a stream of data travelling between adata source and a user of the data. The present example will bedescribed with reference to a transport stream that is a DVB standardtransport stream in which data from up to 8192 PIDs is packed into 188byte transport packets and multiplexed together. The hardware alsosupports the copying of a portion of this data and possible addition ofalternate data back out of the device.

The software that resides on this peripheral may interact with a user ofthe data by means of memory space that is shared between the two.

The transport control (TC) hardware is suitably implemented as a 16 bitprocessor. The processor may be a processor component of a largerintegrated data processing device. TC software (TC code) resides on theTC hardware for performing the transport and data extraction functions.The TC code uses data in shared SRAM to control its operation. There isdata describing 48 slots each of which can collect data from 1 PIDwithin the transport stream. Some slots send data directly to otherdevices, and some place data in circular buffers in the shared memoryspace. There are also data tables containing descrambling keys to allowdescrambling of video or other data, section filter state tables, andother useful data.

The data is suitably carried in the form of PES packets. These may beunits of data for, for example, video, audio or teletext. The PESpackets can occupy many transport packets (consecutive in the PID butnot in the transport stream), but are packed with stuffing bytes so thatany transport packet contains data from only one PES packet. Sectionsare also defined in the data. Sections are blocks of data from 3 to 4096bytes. Sections may span several transport packets. The transportpackets may contain numerous of sections, starting at any offset fromthe head of the packet. Thus the tail end of a section from a previouspacket (having the same PID) could conceivably take up most of a packet.

Each circular buffer has a descriptor in the shared SRAM. In the priorart, one route to describing the state of such a buffer is by means oftwo pointers: a read pointer and a write pointer. The consumer of datafrom the buffer updates the read pointer after taking data out of abuffer, and the write is updated after placing data in a buffer. Aproblem with this approach is that since data can be multiplexed and canspan several transport packets, a buffer may have data added to it overa long period of time before an entire section or PES packet has beencollected. If an error is discovered within the transport stream the PESpacket or section may be in error. In the present system the state ofeach buffer is described by three 3 pointers: a read pointer, a writepointer and a quantized write pointer. The standard 2 pointer model hasread and write, the consumer updates read after taking data out of abuffer, and the write is updated after placing data in a buffer.

In the present system, three pointers are used: a read pointer, a writepointer and a quantized write pointer. The quantized write pointer isonly updated when a valid complete section or PES packet has beencollected. If an error is detected the temporary write pointer isoverwritten with the quantized pointer, thus effecting a windback of thebuffer, and removing the possibility of the buffer containing a partialsection or PES packet.

In a preferred implementation of the present system the supports anumber (e.g. 64) of interrupt bits which are separately maskable,settable and acknowledgable. The TC hardware is then able to codeset theinterrupt bit for each slot when a completed PES packet or section hasbeen collected for that slot. When data arrives frequently it ispossible for a large number of interrupts to be generate, degradingsystem performance. Also given one interrupt the software may need tohandle one or many input PESs packets or sections.

The present system is arranged so that the interrupt handler disablesfurther interrupts on a slot when it receives the first interrupt, tosignal to the inputting process and to have the input process functionin a simple loop of the form:

-   -   while true        -   wait on data present semaphore        -   handle one section or PES packet        -   call function to update read pointer to after the handled            section/PES packet

The function that updates the read pointer also checks to see if anydata remains, or has arrived, in the circular buffer, if data is presentit re-signals the data present semaphore, if not then it re-enables theinterrupt. This simplifies the input process to a simple loop, andreduces interrupt traffic by leaving the interrupt disabled until theinputting process has consumed all data in the input buffer, includingany that arrived during processing of the data that was present when itwas first signalled.

By means of this approach the main loop set out above for processingdata can continue to run unaltered when the buffer overflows. Thestepwise operation of the loop is under the control of the data presentsemaphore. By returning the data present semaphore to its set or truestate after a section has been handled or processed, the loop can becaused to continue unpaused until all data has been read. Then theinterrupt can be reset or disabled.

It is generally very difficult to debug the software on a peripheralsuch as the present unit since when running normally there is no way tomonitor the instruction pointer or registers at anything approachingreal time, and there is no breakpoint mechanism available. Also,debugging an interrupt handler is especially difficult since in aworking system it is undesirable to interfere with the execution of thehandler.

In the present system a macro called debug_event is called at variouspoints in the code. This macro takes as a parameter a constant value orregister to be written into a buffer in the shared SRAM, for the TCcode, or in an unused region of the main memory for code running on themain processor unit that is to receive data from the TC unit. Two othermacros are called during initialization of the code: print_debug_eventsand initialize_debug_events; (which are called in that order) to printdebug information from the previous run and initialize the buffers forthe current run.

This method of displaying debug at the start of the next run allows fora method of debugging code that it is not wished to greatly perturb, andwhich may completely crash the processor, which cannot be examined inother ways.

The TC is suitably embodied as a 16 bit processor without a carry flag.Incoming data can be stored via a DMA engine into a circular buffer,which wraps around. When a section or PES packet is completed, thereturned address for the end of that section or packet is not wrapped.It is possible, for example, that if the system is three bytes from theend of the buffer and a 6 byte section arrived for processing 3 byteswill be stored at the end and 3 at the beginning, but the address of theend of the section would be given as 3 bytes beyond the end of thebuffer. To address this, this case is recognised and the address fixedup to three bytes from the beginning of the buffer. If the address is a32 bit address and the TC is a 16 bit device without a carry flag (butwith zero and sign flags) a special algorithm can be provided to do thefixup. The algorithm is given below, where ptr is the returned address,top is the end of the buffer, and base is the base of the buffer. Highand low refer to the 16 bit portions of the 32 bit values:

-   -   Note VH=ptr high VL=ptr low        -   TH=top high TL=top low        -   OH=offset high OL=offset low        -   BH=base high BL=base low    -   Pointer wraparound algorithm is:        -   1/Find offset (Pointer−TOP) if        -    its −ve then no wraparound            -   Calculate OH=(VH−TH) if −ve exit            -   if (VL and TL same sign)                -   Calculate OL=(VL−TL)                -    if result +ve then we have wraparound                -    else carry, OH−, if −ve exit            -   else (VL and TL different sign)                -   Calculate OL=(VL−TL)                -    if (TL −ve ) carry, OH−, if −ve exit                -    els we have wraparound        -   2/Now have OH and OL, calculate        -    wrapped pointer (Base+Offset)            -   VH=BH+OH            -   if (BL and OL not same sign)                -   calculate VL=BL+OL                -    if (VL+ve carry) VH++            -   else                -   calculate VL=BL+OL                -    if (both were −ve then carry) VH++

Section filtering is suitably supported, whereby it may be decided whichsections to place in the user's circular buffer, for example when, dueto high rates, it is necessary to discard many sections. In somecircumstances it is desired that some section filters be enabled whenother filters have matched. This is described as an action on thematching filter. There are 32 filters, and any of them may haveactions—though there should never be more than 8 with actions associatedat any one time.

In the filtering software it must be checked whether a match is presentbetween 32 bits of data, a 32 bit mask which indicates which filters arecurrently enabled and a 32 bit mask indicating any filtering to beapplied. These could be checked using a simple 32 pass loop, to checkeach bit position one-by-one. However, due to time constraints it wouldbe greatly preferably to avoid this. Therefore, in the present systemthe following are stored:

-   1) a list of masks each with one bit set for each filter with    associated actions-   2) a matching list containing 32 bit masks of those filters to be    enabled on a match-   3) conglomerate masks indicating which filters have actions    associated with them.

The procedure then is to use the conglomerate masks to check if anyaction task needs to be done, if it does then the list is scanned ANDingthe entry from list 1. If a non zero result is achieved then thecorresponding entry from list 2 is ORed in to the mask of which filtersare currently enabled. When the result of the ORing operation is zeroall necessary masks have been applied.

When a user wishes to send out packets on the (“alternate”) outputstream a mechanism is needed that, within the software driver on theuser hardware, can control the insertion of the packets. In the presentsystem a circular list is used to address this problem. A circular listof “carousel” entries is provided. Each entry contains a packet and somecontrol information. The carousel management process cycles round thelist transmitting those entries that are set to be transmitted. An entrymay be in one of several states, disabled, one_shot_inject (signifyingthat it is to be disabled after transmission), repeated_inject_as_is(indicating that it should be repeatedly injected as is),repeated_inject_with_cc_fixup (indicating that it should be repeatedlyinjected with that packed being adjusted to correct continuity counts).Interval controls are provided to allow the retransmission rate etc. tobe specified.

This approach allows several potential problems that could confront theuser to be addressed. In a real transport stream it is normal forsection information to be transmitted every ½ second or so. Using thecarousel as described above removes the overhead for this from the userand allows the driver to manage stream integrity.

In the system of FIG. 5 the decoder is configured so that the errorchecking of section data is transparent to user code. The process forachieving this is illustrated in FIG. 6.

FIG. 6 illustrates a region of memory in the main memory 15. One part 30of the memory stores received section data. Another part 31 of thememory stores pointers QW and R which point to a memory addresses inpart 30. Memory in the processing unit 16 stores another pointer W whichalso points to a memory address in part 30. For illustration the currentaddresses indicated by R, QW and W are shown at 32, 33 and 34respectively in FIG. 6. Pointer R represents a read pointer. Pointer QWrepresents a quantised write pointer. Pointer W represents a writepointer. The contents of the memory 31, representing pointers 32 and 33,are available to user code. The pointer W is preferably not directlyavailable to user code. The extent of part 30 of the memory is known tothe processor 16 and to the user code, and part 30 of the memory isconsidered to wrap around from upper boundary 35 to lower boundary 36.

The operation of the decoder for decoding section data and making itavailable to user code will now be described.

In the user code pointer R is interpreted as a read pointer, indicatingthe next address in the memory 15 from which the user code is to readand process the section data. As section data is read by the user codethe user code updates the pointer R accordingly. The pointer QW isinterpreted by the user code as a limit pointer beyond which the pointerR may not pass. If the pointer R meets the pointer QW then the user codemust consider that no unread section data is currently available.

In the processor 16, initially pointers W and QW are set to the firstaddress in buffer 30 of memory 15. Incoming section data is extractedfrom received packets. Each incoming part of section data is stored atthe write pointer. Then the write pointer is incremented by the lengthof that part so that it is points to a location immediately after thelast written part. This process continues as section data is normallyreceived, until check digit information for a received complete section(stored between the QW and W pointers) is received. At that stage a CRCfor the received data—which could be calculated at that time or couldmore preferably be built up as each incoming section is received—ischecked, for example, by comparison with a received CRC or apredetermined value such as zero. If the CRC for the received data iscorrects match then pointer QW is set to the value of pointer W and theprocess continues; this adjustment of the pointer QW makes the newlychecked section data available to the user code. If the CRCs do notmatch then the value of pointer W is set to the value of pointer QW;this means that the possible erroneous data is not made available to theuser code, and will be overwritten by subsequently received sectiondata.

The ongoing CRC testing may be performed by loading a value of −1 into amemory before reception of a section begins, combining that value witheach received byte of the section in turn including one or more CRCbytes of the section, and comparing the resulting value with zero. Ifthe resulting value is zero then the section may be deemed to have beencorrectly received, and otherwise incorrectly received.

During reception of section data two other errors in addition to the“CRC fail” error are acted upon by the processor 16. Each packetcontaining section data has a serial number. If a section is detected ashaving been received out of order then a “CC (continuity count) fail”error is indicated and the value of pointer W is set to the value ofpointer QW. If (following a wraparound of pointer W) the pointer W meetspointer R then the buffer 30 is interpreted as having overflowed. Toavoid correctly received but unread data (located after the pointer R)being overwritten the value of pointer W is set to the value of pointerQW.

Thus, on completion of any group of received sections the pointer QW isset to the position of pointer W, and on detection of any error thepointer W is set to the position of pointer QW.

In the system of FIG. 6 the interface available to the user code isdesigned so that the user code has no access to the pointer W. The usercode is unaware of the position of pointer W. The user code can,however, safely read data up to pointer QW. Therefore the error checkingof section data that is performed by the processor 16 is transparent tothe user code.

One buffer as shown in FIG. 6 with respective associated pointers W, QWand R may be maintained for each PID from which section data is to bereceived. When the PID is selected by the user code for reception theuser code allocates in memory 15 the buffer indicated in FIG. 6 at 30and 31 and informs the processor 16 of the address and length of thebuffer. When the user shuts down a channel the processor 16 flushes thebuffer for that channel and sets the associated QW pointers to the valueof the associated W pointer.

The applicant draws attention to the fact that the present invention mayinclude any feature or combination of features disclosed herein eitherimplicity or explicitly or any generalisation thereof, withoutlimitation to the scope of any of the present claims. In view of theforegoing description it will be evident to a person skilled in the artthat various modifications may be made within the scope of theinvention.

1. A method for processing an instruction word in a data processingsystem, the instruction word comprising a plurality of instruction bitpositions, each bit position corresponding to an instruction action, anda status of the bit at an instruction bit position indicating whetherthe instruction action corresponding to that bit position should beperformed, the method comprising: forming a plurality of single actionwords, each single action word corresponding to one of the instructionactions and having a bit set at the bit position corresponding to thatinstruction action and all its other bits un-set; forming a commonaction word having bits set at the bit positions corresponding to theinstruction actions of any of the single action words and all its otherbits un-set; comparing the instruction word and the common action word,and if the instruction word and the common action word have no bits setin common, terminating processing of the instruction, and otherwise:repeating for successive single action words the steps of: comparing theinstruction word and the respective single action word, and if theinstruction word and the respective single action word have a bit set incommon, performing the action corresponding to that single action word,and setting the instruction word to be equal to the present value of theinstruction word exclusive-ORed with the respective single action word;until all the bits in the instruction word are zero.
 2. A method asclaimed in claim 1, wherein the instruction word is a 32 bit word.
 3. Amethod as claimed in any preceding claim, wherein the instruction actionis a filter or transmission action.
 4. A method as claimed in claim 1,wherein the data processing system is for processing an input datastream comprising a plurality of data units.
 5. A method as claimed inclaim 4, wherein each data unit comprises a field indicative ofcharacteristics of the data unit and the instruction word is formed fromthe contents of the said field.
 6. A method as claimed in claim 5,wherein the said field comprises bits indicative of the transport streamto which the instruction word belongs.
 7. A method as claimed in claim6, wherein the action is an action to filter or to transmit the dataunit from which the instruction word is derived.
 8. A method as claimedin any of claim 4, wherein the data stream is in accordance with theITU-T H.222 standard or a derivative thereof.
 9. A data processingapparatus for processing an instruction word, the instruction wordcomprising a plurality of instruction bit positions, each bit positioncorresponding to an instruction action, and a status of the bit at aninstruction bit position indicating whether the instruction actioncorresponding to that bit position should be performed, the apparatuscomprising: a processor unit configured to: form a plurality of singleaction words, each single action word corresponding to one of theinstruction actions and having a bit set at the bit positioncorresponding to that instruction action and all its other bits un-set;form a common action word having bits set at the bit positionscorresponding to the instruction actions of any of the single actionwords and all its other bits un-set; and compare the instruction wordand the common action word, and terminate processing of the instructionif the instruction word and the common action word have no bits set incommon, and otherwise for successive single action words and until allthe bits in the instruction word are zero: compare the instruction wordand the respective single action word, perform the action correspondingto that single action word if the instruction word and the respectivesingle action word have a bit set in common, and set the instructionword to be equal to the present value of the instruction wordexclusive-ORed with the respective single action word.
 10. A method forprocessing a data word having a plurality of bit positions, each bitposition corresponding to an action, and a logical value of the bit ateach bit position indicating whether that action is to be performed,comprising: forming a plurality of single bit set words, each single bitset word corresponding to one action to be taken; forming a commonaction word having bits set at bit positions corresponding to actions tobe taken with respect to each of the plurality of single bit set words;comparing the data word and the common action word to determine whetherthey have corresponding bits which are set; and if so, repeating forsuccessive single bit set words until all bits in the data word arezero: comparing the data word and a respective one of the single bit setwords to identify a bit which is set in common; performing the actioncorresponding to that single action word if there is a common bit set;and setting the data word to be equal to the present value of theinstruction word exclusive-ORed with the respective single bit set word.11. A method for processing a data word having a plurality of bitpositions, each bit position corresponding to an action, and a logicalvalue of the bit at each bit position indicating whether that action isto be performed, comprising: forming a plurality of single bit setwords, each single bit set word corresponding to one action to be taken;forming a common action word having bits set at bit positionscorresponding to actions to be taken with respect to each of theplurality of single bit set words; comparing the data word and thecommon action word to determine whether they have corresponding bitswhich are set; and if so, for each single bit set word associated withthe correspondingly set bits: comparing the data word and the single bitset word to identify a bit which is set in common; and performing theaction corresponding to that single action word if there is a common bitset.